Biography
Karthik Rajashekaraiah received the B.E degree in electrical and electronics engineering, and M.Tech degree in Power Electronics from Visvesvaraya Institute of Technology, Belgaum, Karnataka, India in 2012 and 2016 respectively. He is currently pursuing his PhD in “Modelling and simulation of multi-modal networks” under Prof. Giovanni De Carne.
Previously, he was working as a Field Application Engineer with OPAL-RT Technologies India (P) Ltd., Bengaluru, India. He also worked as an Engineer Trainee with TeleDNA Communications India (P) Ltd., Bengaluru, India.
His research interest include modelling, simulation and Analysis of power electronics in power systems applications, Power-Hardware in the Loop studies in real-time applications.
Publication list
P-Q Theory-based Dynamic Load Modelling in Short-Circuit Analysis
Rajashekaraiah, K.; Carne, G. De; Iurlaro, C.; Semeraro, M.; Bruno, S.
2023. 2023 8th IEEE Workshop on the Electronic Grid (eGRID), 5 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/eGrid58358.2023.10380853
Rajashekaraiah, K.; Carne, G. De; Iurlaro, C.; Semeraro, M.; Bruno, S.
2023. 2023 8th IEEE Workshop on the Electronic Grid (eGRID), 5 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/eGrid58358.2023.10380853
Modelling of 3-Phase p-q Theory-Based Dynamic Load for Real-Time Simulation
Rajashekaraiah, K.; Iurlaro, C.; Bruno, S.; Carne, G. De
2023. IEEE Open Access Journal of Power and Energy, 10, 654–664. doi:10.1109/OAJPE.2023.3340299
Rajashekaraiah, K.; Iurlaro, C.; Bruno, S.; Carne, G. De
2023. IEEE Open Access Journal of Power and Energy, 10, 654–664. doi:10.1109/OAJPE.2023.3340299